India’s
ai infrastructure industry,
in focus.

Limits of Von Neumann and Memory

33.0% of this theme group

Researchers highlight bottlenecks in traditional architectures and challenges of emerging in‑memory technologies for big data workloads.

Von Neumann architecture (7) · In-Memory Processing (8) · Big data (4) · Semiconductor memory (3)

In-memory computing with emerging memory devices: Status and outlook

Toward memristive in-memory computing: principles and applications

Non‑Volatile Memory Constraints

23.9% of this theme group

Papers discuss reliability, endurance, and integration issues of SRAM, MRAM, and RRAM for in‑memory computing.

Static random-access memory (5) · Resistive random-access memory (6) · Random access memory (3) · Non-volatile memory (3)

Resistive-RAM-Based In-Memory Computing for Neural Network: A Review

Domain-Specific STT-MRAM-Based In-Memory Computing: A Survey

Hardware‑Software Co‑Design Gaps

22.7% of this theme group

Works point out mismatches between accelerator hardware and software stacks, calling for unified programming models.

Computer architecture (9) · Software (3) · Software engineering (2) · Programming language (2)

Hardware-software co-design of deep learning accelerators

Centralized Generic Interfaces in Hardware/Software Co-design for AI Accelerators

Photonic and Edge Deployment Hurdles

20.5% of this theme group

Studies examine packaging, photonic integration, and energy limits that impede edge AI accelerator adoption.

Enhanced Data Rates for GSM Evolution (5) · Software deployment (3) · Photonics (3) · Vendor (2)

Emerging devices and packaging strategies for electronic-photonic AI accelerators: opinion

Brief overview of Edge AI accelerators for energy-constrained edge

Precision Risks in Resistive Memories

42.9% of this theme group

Authors caution that conductance variability and multilevel programming errors threaten accurate in‑memory computation.

Resistive random-access memory (10) · In-Memory Processing (4) · Parallel computing (4) · Von Neumann architecture (3)

Conductance variations and their impact on the precision of in-memory computing with resistive switching memory (RRAM)

Experimental Assessment of Multilevel RRAM-Based Vector-Matrix Multiplication Operations for In-Memory Computing

Digital In‑Memory Overheads

27.0% of this theme group

Research warns that digital in‑memory schemes add latency and power costs that may offset their speed benefits.

Enhanced Data Rates for GSM Evolution (5) · Edge computing (3) · Electronic engineering (3) · Overhead (2)

Digital In-Memory Computing to Accelerate Deep Learning Inference on the Edge

RAW 2024 Invited Talk-2: Digital In-Memory Computing to Accelerate Deep Learning Inference on the Edge

Security Vulnerabilities in Accelerators

19.0% of this theme group

Papers expose glitch, timing, and side‑channel attacks that compromise the integrity of edge AI hardware.

Embedded system (5) · Field-programmable gate array (4) · Stratix (2) · Software (2)

Imperceptible Misclassification Attack on Deep Learning Accelerator by Glitch Injection

Time to Leak: Cross-Device Timing Attack On Edge Deep Learning Accelerator

Reliability of Tensor Processors

11.1% of this theme group

Analyses reveal failure modes and power‑related reliability concerns for TPU‑style units in embedded settings.

Tensor (5) · Reliability (3) · Convolutional neural network (2) · Power (2)

Reliability of Google's Tensor Processing Units for Embedded Applications

Reliability of Google’s Tensor Processing Units for Convolutional Neural Networks

Scalable Parallel In‑Memory Architectures

29.0% of this theme group

Works propose new parallel designs that combine compute and storage to boost inference throughput at scale.

Parallel computing (113) · Computer architecture (93) · Scalability (45) · Theoretical computer science (15)

Scalable and Programmable Neural Network Inference Accelerator Based on In-Memory Computing

Hybrid Analog-Digital In-Memory Computing

Hybrid Memory for Efficient DNNs

19.3% of this theme group

Studies explore combining volatile and non‑volatile memories to reduce area and energy while preserving accuracy.

Static random-access memory (110) · Resistive random-access memory (100) · Magnetoresistive random-access memory (50) · Parallel computing (67)

2-Bit-Per-Cell RRAM-Based In-Memory Computing for Area-/Energy-Efficient Deep Learning

Hybrid RRAM/SRAM in-Memory Computing for Robust DNN Acceleration

Low‑Power Systolic and Embedded Designs

15.2% of this theme group

Research presents systolic arrays and test architectures aimed at minimizing power on embedded AI platforms.

Systolic array (9) · Criticality (7) · Enhanced Data Rates for GSM Evolution (16) · Embedded system (26)

Highly Efficient Test Architecture for Low-Power AI Accelerators

Power Estimation and Energy Efficiency of AI Accelerators on Embedded Systems

Reconfigurable Memristive Logic Platforms

14.1% of this theme group

Papers describe ferroelectric and memristor‑based devices that enable adaptable logic and neural network functions.

Memristor (61) · Ferroelectricity (25) · Optoelectronics (30) · Transistor (25)

Reconfigurable Smart In-Memory Computing Platform Supporting Logic and Binarized Neural Networks for Low-Power Edge Devices

Content-Addressable Memories and Transformable Logic Circuits Based on Ferroelectric Reconfigurable Transistors for In-Memory Computing

FPGA‑Based Custom AI Accelerators

12.2% of this theme group

Works highlight flexible FPGA designs that accelerate convolutional networks and allow rapid hardware customization.

Field-programmable gate array (34) · Hardware acceleration (14) · Computer architecture (34) · Convolutional neural network (14)

Reconfigurable Hardware Architecture Design and Implementation for AI Deep Learning Accelerator

Customization of a Deep Learning Accelerator

Crossbar Neuromorphic Computing

6.5% of this theme group

Research showcases binary RRAM crossbars for distributed, energy‑efficient matrix multiplication and neuromorphic tasks.

Crossbar switch (83) · Resistive random-access memory (30) · Memristor (24) · Neuromorphic engineering (16)

Distributed In-Memory Computing on Binary RRAM Crossbar

An energy-efficient matrix multiplication accelerator by distributed in-memory computing on binary RRAM crossbar

Tensor Processing in Cloud Environments

3.6% of this theme group

Studies evaluate TPUs in datacenters and develop performance models for large‑scale tensor workloads.

Tensor (19) · Cloud computing (7) · Discretization (4) · Computational science (7)

In-Datacenter Performance Analysis of a Tensor Processing Unit

A Learned Performance Model for Tensor Processing Units

Bengaluru

37.0% across the displayed hubs

18 companies hiring · $306.8M disclosed funding

Hyderabad

13.7% across the displayed hubs

6 companies hiring · $773.5K disclosed funding

Delhi

10.1% across the displayed hubs

5 companies hiring · $184.7M disclosed funding

Mumbai

9.6% across the displayed hubs

5 companies hiring · $664.8M disclosed funding

Gurugram

8.6% across the displayed hubs

3 companies hiring · $1.6M disclosed funding

Noida

8.1% across the displayed hubs

2 companies hiring · $2.7M disclosed funding

Pune

6.6% across the displayed hubs

3 companies hiring · $1.4M disclosed funding

Chennai

6.3% across the displayed hubs

3 companies hiring · $12.0M disclosed funding