China’s
chip design and eda industry,
in focus.

Design Automation Challenges

19.8% of this theme group

Researchers discuss obstacles in automating electronic design and system engineering workflows.

Automation (204) · Electronic design automation (172) · Systems engineering (36) · Software engineering (21)

DESIGN AUTOMATION STATE OF PRACTICE - POTENTIAL AND OPPORTUNITIES

Challenges and opportunities of ESL design automation

Integrated Circuit Physical Design

18.9% of this theme group

Papers highlight difficulties in circuit layout, placement, and physical optimization for ICs.

Circuit design (72) · Integrated circuit (59) · Integrated circuit design (47) · Physical design (54)

ComputerAided Design of Analog and MixedSignal Integrated Circuits

Circuit Optimization and Analysis for Compatibility Assessment in Integrated Product Design

High‑Level Synthesis Limits

17.3% of this theme group

Works examine constraints of using HDL‑based synthesis to speed product development.

Verilog (15) · Hardware description language (15) · VHDL (18) · Very-large-scale integration (24)

High-Level Synthesis: Boosting Designer Productivity and Reducing Time to Market

Design and verification using high-level synthesis

Logic Gate and Synthesis Issues

16.3% of this theme group

Studies address problems in gate‑level design, emerging logic families, and synthesis techniques.

Logic gate (105) · Logic synthesis (78) · Pass transistor logic (27) · Logic family (28)

Supramolecular Switches-Advanced Molecular Logic and Computation Molecular Logic Gates

Emerging Technologies: Challenges and Opportunities for Logic Synthesis

Physical Design Flow Bottlenecks

9.7% of this theme group

Authors identify inefficiencies in interconnect modeling, power, performance, and area trade‑offs.

Physical design (98) · Design flow (24) · Very-large-scale integration (21) · Integrated design (8)

Interconnect Modeling: A Physical Design Perspective

Power, Performance and Area Optimization of I/O Design

FPGA Prototyping Constraints

9.2% of this theme group

Research points out limits of reconfigurable hardware for ASIC prototyping and education.

Field-programmable gate array (115) · Reconfigurable computing (17) · FPGA prototype (9) · Programmable logic device (17)

Using multi-FPGA systems for ASIC prototyping

Teaching Field Programmable Gate Array Design (Fpga) To Future Electrical Engineering Technologists: Course Development

EDA Automation Shortcomings

8.8% of this theme group

Papers critique current computer‑aided design tools and their integration with human designers.

Electronic design automation (68) · Computer Aided Design (24) · Automation (31) · Electronics (14)

AI-EDA: Toward a Holistic Approach to AI-Powered EDA

Humans for EDA and EDA for humans

3D IC Interconnect Risks

23.1% of this theme group

Works caution about power and thermal challenges in monolithic and stacked 3D integration.

Interconnection (18) · Integrated circuit (11) · Physical design (16) · Power (9)

Design automation and testing of monolithic 3D ICs: Opportunities, challenges, and solutions: (Invited paper)

Enabling 3D Integration Through Optimal Topography

Logic Synthesis Optimization Limits

21.5% of this theme group

Studies warn of complexity and verification difficulties in combinational and sequential logic optimization.

Logic gate (25) · Logic synthesis (15) · Combinational logic (7) · Logic optimization (6)

LOGIC SIMULATION USING A COLLECTION OF INTERLOCKED STATE MACHINES *

The Design and Implementation of Clocked Variables in

FPGA Design Scalability Concerns

18.3% of this theme group

Researchers highlight scalability and toolchain issues when targeting large, embedded FPGA systems.

Field-programmable gate array (50) · Embedded system (10) · Programmable logic device (8) · Programmable Array Logic (5)

Rethinking FPGAs

Breaking Boundaries: Optimizing FPGA CAD with Flexible and Multi-threaded Re-Clustering

Automation Workflow Flexibility

18.3% of this theme group

Papers discuss the need for adaptable design flows and the risks of rigid automation.

Automation (32) · Electronic design automation (19) · Flexibility (7) · Workflow (4)

Investigating modern layout representations for improved 3d design automation

Estimating the Impact of Design Automation: The Influence of Knowledge on Potential Estimation

Memristor Logic Robustness

10.3% of this theme group

Works examine reliability and overhead challenges of memristor‑based logic gates.

Logic gate (28) · Pass transistor logic (12) · Memristor (7) · AND-OR-Invert (6)

Overhead Requirements for Stateful Memristor Logic

On the robustness of memristor based logic gates

Formal Verification of Adders

8.7% of this theme group

Research points out difficulties in proving correctness of complex arithmetic hardware.

Carry (4) · Register-transfer level (5) · Formal verification (3) · Adder (4)

Hardware verification using higher-order logic

PDL: a high-level hardware design language for pipelined processors

Advanced ASIC and Analog Design

18.3% of this theme group

Opportunities focus on new tools and methods for high‑performance ASIC and analog circuit automation.

Circuit design (189) · Design flow (198) · Physical design (189) · Integrated circuit (103)

Closing the Gap Between ASIC & Custom: Tools and Techniques for High-Performance ASIC Design

Circuits and Techniques for Cell-based Analog Design Automation in Advanced Processes

Large‑Scale Placement and Routing

16.8% of this theme group

Papers explore novel placement and routing algorithms for massive VLSI and 3D designs.

Very-large-scale integration (156) · Routing (149) · Netlist (90) · Placement (70)

A multilevel analytical placement for 3D ICs

Routability-driven analytical placement by net overlapping removal for large-scale mixed-size designs

Emergent Logic Gate Technologies

16.4% of this theme group

Research highlights innovative gate concepts such as phase‑transition FETs and MEMS‑based logic.

Logic gate (834) · Pass transistor logic (339) · Logic family (211) · AND-OR-Invert (126)

Phase Transition FETs for Improved Dynamic Logic Gates

A Cascadable Reconfigurable Micro-electromechanical Resonator Logic Gate

Reversible and Sequential Logic Synthesis

13.8% of this theme group

Works propose efficient synthesis techniques for reversible and sequential logic structures.

Logic synthesis (384) · Logic gate (358) · Logic optimization (134) · Sequential logic (116)

An efficient approach for designing and minimizing reversible programmable logic arrays

A novel method of synthesizing reversible logic

Next‑Generation FPGA Architectures

13.8% of this theme group

Studies present new reconfigurable logic blocks and optimization strategies for embedded FPGA systems.

Field-programmable gate array (775) · Gate array (57) · Lookup table (85) · Embedded system (110)

Advanced Logic Gates for FPGAs

Emerging Reconfigurable Logic Device Based FPGA Design and Optimization

Integrated Automation Frameworks

13.2% of this theme group

Papers describe holistic automation platforms linking EDA tools with system‑level engineering.

Automation (420) · Electronic design automation (355) · Computer Aided Design (92) · Systems engineering (47)

Integrated automated design approach for building automation systems

A Design Automation Framework Supporting Design for Additive Manufacturing

Low‑Power Arithmetic Unit Designs

7.7% of this theme group

Research showcases energy‑efficient adder and multiplier architectures using novel logic styles.

Adder (390) · Carry-save adder (68) · Serial binary adder (56) · Multiplier (97)

Design of fault tolearnt full Adder/Subtarctor using reversible gates

Energy efficient low power high speed full adder design using hybrid logic

Shanghai

30.1% across the displayed hubs

1 companies hiring · $3.0B disclosed funding

Shenzhen

28.0% across the displayed hubs

1 companies hiring · $397.3M disclosed funding

Beijing

10.8% across the displayed hubs

0 companies hiring · $761.0M disclosed funding

Haidian

9.7% across the displayed hubs

0 companies hiring · $743.6M disclosed funding

Hangzhou

7.0% across the displayed hubs

0 companies hiring · $374.6M disclosed funding

Nanjing

5.4% across the displayed hubs

0 companies hiring · $120.9M disclosed funding

Pudong

4.8% across the displayed hubs

1 companies hiring · $745.7M disclosed funding

Zhuhai

4.3% across the displayed hubs

0 companies hiring · $1.5M disclosed funding