Australia’s
semiconductors industry,
in focus.

Analog and Mixed‑Signal Circuit Design

21.5% of this theme group

Researchers highlight challenges in designing and testing high‑precision analog and RF integrated circuits.

Integrated circuit (327) · Electronic circuit (231) · Mixed-signal integrated circuit (75) · Electronic engineering (89)

Design and test of analog circuits towards sub-ppm level

Design of CMOS RF Integrated Circuits and Systems

Nano‑CMOS Device and Material Issues

17.2% of this theme group

Papers discuss material limitations and design hurdles for nano‑scale CMOS and other nanoelectronic devices.

Transistor (214) · CMOS (189) · Electronic circuit (118) · Nanoelectronics (36)

Nanoelectronic Materials, Devices and Modeling: Current Research Trends

1Meeting the Design Challenges of nano-CMOS Electronics

Reliability and Security of Hardware

17.0% of this theme group

Works focus on process variation, reliability engineering, and hardware‑trojan threats in integrated circuits.

Reliability (150) · Hardware security module (37) · Reliability engineering (58) · Hardware Trojan (25)

Reliability- and Process-variation aware design of integrated circuits — A broader perspective

Device Reliability to Circuit Qualification: Insights and Challenges

Power Semiconductor Device Challenges

16.7% of this theme group

Studies address efficiency, material, and performance problems in power devices such as SiC and organic semiconductors.

Semiconductor (268) · Semiconductor device (123) · Power semiconductor device (82) · Silicon carbide (44)

Power-Semiconductor Devices and Components for New Power Converter Developments: A key enabler for ultrahigh efficiency power electronics

Research and Progress on Organic Semiconductor Power Devices

Advanced IC Packaging and Interconnects

15.8% of this theme group

Research points to difficulties in packaging, soldering, and fine‑pitch interconnection for high‑voltage and dense ICs.

Integrated circuit packaging (74) · Wafer (92) · Soldering (53) · Interconnection (96)

Advancing Electronic Packaging Using Microsolder Balls: Making 25-nm Pitch Interconnection Possible

Moldability Challenges Associated with the Assembly of Thicker IC Packages for High Voltage and Power Applications

3‑D IC Stacking and TSV Testing

6.7% of this theme group

Papers examine testability, design, and reliability concerns for three‑dimensional stacked circuits.

Three-dimensional integrated circuit (93) · Integrated circuit (91) · Stacking (28) · Through-silicon via (24)

Test Challenges for 3D Integrated Circuits

3D integration: Circuit design, test, and reliability challenges

Silicon Photonics Integration Issues

5.1% of this theme group

Works identify obstacles in merging photonic and electronic functions on silicon platforms.

Photonics (113) · Photonic integrated circuit (72) · Silicon photonics (34) · Integrated circuit (66)

Photonic Integrated Circuits for Optical Communication

Silicon Photonics Technologies for Monolithic Electronic-Photonic Integrated Circuit Applications

Power Device Material Degradation

20.6% of this theme group

Authors caution about damage mechanisms and performance limits in emerging power semiconductor materials.

Semiconductor (102) · Transistor (79) · Semiconductor device (36) · Power semiconductor device (32)

Fine-Tuning the\nPerformance of Ultraflexible Organic\nComplementary Circuits on a Single Substrate via a Nanoscale Interfacial\nPhotochemic

MECHANISM OF BIJUNCTION SEMICONDUCTOR DEVICE DAMAGE INDUCED BY HEAVY PARTICLES

Reliability of Large‑Scale Integrated Circuits

19.1% of this theme group

Studies warn of electromigration, mixed‑signal dependencies, and other reliability risks in dense ICs.

Electronic circuit (93) · Integrated circuit (84) · Very-large-scale integration (19) · Reliability engineering (17)

Securing Analog Mixed-Signal Integrated Circuits Through Shared Dependencies

Electromigration Failures in Integrated Circuits: A Review of Physics-Based Models and Analytical Methods

Scaling Limits in Advanced CMOS

17.1% of this theme group

Research highlights reliability and aging concerns as CMOS dimensions shrink below 32 nm.

CMOS (113) · Transistor (63) · Static random-access memory (24) · Scaling (25)

Analog circuit reliability in sub-32 nanometer CMOS: Analysis and mitigation

Stralingstolerante en Verouderingsresistente Digitale Geïntegreerde Schakelingen in Nanoscale CMOS Technologie.

Packaging Thermal and Mechanical Stress

14.5% of this theme group

Papers advise caution on thermal cycling and structural optimization for BGA and SiP packages.

Ball grid array (43) · Integrated circuit packaging (51) · Soldering (52) · Lead frame (27)

Chip–Package Interaction and Reliability Improvement by Structure Optimization for Ultralow-$k$ Interconnects in Flip-Chip Packages

Studies on the Thermal Cycling Reliability of BGA System-in-Package (SiP) With an Embedded Die

Photonic Device Fabrication Risks

13.8% of this theme group

Works point out material and process uncertainties in silicon photonic and multilayer photonic circuits.

Photonics (31) · Photonic integrated circuit (17) · Silicon photonics (13) · Wafer (25)

A Review of Integrated Photonic Devices Using Sb₂Se₃

Experimental evaluation of photonic integrated circuits for multilayer photonic neural networks

3‑D IC Interconnect Coupling Effects

10.1% of this theme group

Authors caution about capacitance, thermal, and reliability impacts of through‑silicon vias in stacked chips.

Through-silicon via (59) · Three-dimensional integrated circuit (58) · Stacking (21) · Interconnection (40)

Analysis of coupling capacitance between TSVs and metal interconnects in 3D-ICs

Thermal analysis of three-dimensional ICs, investigating the effect of through-silicon vias and fabrication parameters

Schottky Diode and Optoelectronic Limits

4.9% of this theme group

Research flags defect and modeling challenges for high‑voltage Schottky and related optoelectronic devices.

Schottky diode (31) · Diode (37) · Schottky barrier (18) · Optoelectronics (33)

Defect engineering in SiC technology for high-voltage power devices

The behavioral approach to silicon carbide power components modeling

Heterojunction and Multi‑Material Semiconductors

19.8% of this theme group

Opportunities arise from combining diverse semiconductor materials to boost performance and lower costs.

Semiconductor (493) · Semiconductor device (143) · Transistor (224) · Heterojunction (72)

A Meeting of Materials: Integrating Diverse Semiconductor Technologies for Improved Performance at Lower Cost

Semiconductor transformers

Low‑Power CMOS Amplifier Innovations

19.5% of this theme group

Papers explore novel CMOS amplifier designs for energy‑efficient analog‑digital mixed‑signal systems.

CMOS (520) · Amplifier (137) · Electrical engineering (121) · Transistor (174)

Integration of Complementary Metal–Oxide–Semiconductor 1-Bit Analog Selectors and Single-Electron Transistors Operating at Room Temperature

Design techniques for low power mixed analog-digital circuits with application to smart wireless systems.

Secure and Adaptive Integrated Circuits

17.2% of this theme group

Research proposes techniques for timing verification, security, and reliability enhancements in mixed‑signal ICs.

Electronic circuit (463) · Integrated circuit (360) · Electronic engineering (164) · Mixed-signal integrated circuit (77)

Timing Verification for Adaptive Integrated Circuits

On-chip Structures and Techniques to Improve the Security, Trustworthiness and Reliability of Integrated Circuits

Advanced Design Automation for FPGAs and ASICs

15.9% of this theme group

Works present new methods for standard‑cell layout, scan‑chain generation, and test pattern creation in modern processes.

Scan chain (94) · Standard cell (104) · Field-programmable gate array (76) · Automatic test pattern generation (47)

Standard Cell Layout Generator Amenable to Design Technology Co-Optimization in Advanced Process Nodes

FPGA Simulations of Charge Sharing Effect Compensation Algorithms for Implementation in Deep Sub-Micron Technologies

Next‑Generation Thermal Bonding and Packaging

12.3% of this theme group

Studies highlight high‑throughput bonding and multifunctional temporary materials for advanced interconnects.

Wafer (151) · Integrated circuit packaging (79) · Interconnection (110) · Soldering (62)

A high throughput and reliable thermal compression bonding process for advanced interconnections

Advanced Multifunctional Temporary Bonding Materials with Heterogeneous Integrated Properties for Various Advanced Packaging Applications

Hybrid Silicon Photonic Integration

8.4% of this theme group

Papers showcase hybrid approaches and device innovations for silicon photonic integrated circuits.

Photonics (282) · Photonic integrated circuit (202) · Silicon photonics (63) · Optoelectronics (110)

Hybrid Silicon Photonic Integrated Circuit Technology

Silicon photonic devices and integrated circuits

Cost‑Effective 3‑D IC Integration

6.9% of this theme group

Research focuses on thermal‑enhanced TSV interposers and manufacturing methods for high‑performance 3‑D chips.

Three-dimensional integrated circuit (166) · Through-silicon via (104) · Stacking (51) · Integrated circuit (111)

Thermal-Enhanced and Cost-Effective 3D IC Integration With TSV (Through-Silicon Via) Interposers for High-Performance Applications

Design and manufacturing enablement for three-dimensional (3D) integrated circuits (ICs)

Sydney

28.0% across the displayed hubs

2 companies hiring · $455.2M disclosed funding

Melbourne

28.0% across the displayed hubs

2 companies hiring · $55.4M disclosed funding

Brisbane

12.9% across the displayed hubs

0 companies hiring · $0 disclosed funding

Adelaide

12.1% across the displayed hubs

3 companies hiring · $795.0K disclosed funding

Perth

8.3% across the displayed hubs

0 companies hiring · $0 disclosed funding

Canberra

4.5% across the displayed hubs

0 companies hiring · $38.4M disclosed funding

Rowville

3.8% across the displayed hubs

0 companies hiring · $0 disclosed funding

Richmond

2.3% across the displayed hubs

0 companies hiring · $10.0M disclosed funding