China’s
semiconductors industry,
in focus.

Analog and Mixed‑Signal Circuit Design

21.5% of this theme group

Researchers discuss challenges in designing and testing analog and mixed‑signal integrated circuits for high‑precision applications.

Integrated circuit (327) · Electronic circuit (231) · Mixed-signal integrated circuit (75) · Electronic engineering (89)

Design and test of analog circuits towards sub-ppm level

Design of CMOS RF Integrated Circuits and Systems

Nano‑CMOS Device and Modeling Issues

17.2% of this theme group

Papers highlight material, device, and modeling hurdles faced when scaling transistors to nano‑CMOS dimensions.

Transistor (214) · CMOS (189) · Electronic circuit (118) · Nanoelectronics (36)

Nanoelectronic Materials, Devices and Modeling: Current Research Trends

1Meeting the Design Challenges of nano-CMOS Electronics

Reliability and Security of Hardware

17.0% of this theme group

Works examine reliability concerns and hardware‑trojan threats affecting integrated circuit qualification and long‑term operation.

Reliability (150) · Hardware security module (37) · Reliability engineering (58) · Hardware Trojan (25)

Reliability- and Process-variation aware design of integrated circuits — A broader perspective

Device Reliability to Circuit Qualification: Insights and Challenges

Power Semiconductor Device Limitations

16.7% of this theme group

Studies address performance and material constraints of power devices, including silicon‑carbide and organic semiconductor technologies.

Semiconductor (268) · Semiconductor device (123) · Power semiconductor device (82) · Silicon carbide (44)

Power-Semiconductor Devices and Components for New Power Converter Developments: A key enabler for ultrahigh efficiency power electronics

Research and Progress on Organic Semiconductor Power Devices

Packaging and Interconnection Challenges

15.8% of this theme group

Research focuses on difficulties in IC packaging, wafer handling, soldering, and high‑density interconnects.

Integrated circuit packaging (74) · Wafer (92) · Soldering (53) · Interconnection (96)

Advancing Electronic Packaging Using Microsolder Balls: Making 25-nm Pitch Interconnection Possible

Moldability Challenges Associated with the Assembly of Thicker IC Packages for High Voltage and Power Applications

3‑D Integration and TSV Testing

6.7% of this theme group

Articles explore testing complexities and reliability issues inherent to three‑dimensional stacked ICs and through‑silicon vias.

Three-dimensional integrated circuit (93) · Integrated circuit (91) · Stacking (28) · Through-silicon via (24)

Test Challenges for 3D Integrated Circuits

3D integration: Circuit design, test, and reliability challenges

Photonic Integrated Circuit Barriers

5.1% of this theme group

Papers identify technical obstacles in merging photonic and electronic functions on silicon platforms.

Photonics (113) · Photonic integrated circuit (72) · Silicon photonics (34) · Integrated circuit (66)

Photonic Integrated Circuits for Optical Communication

Silicon Photonics Technologies for Monolithic Electronic-Photonic Integrated Circuit Applications

Device Damage and Material Fragility

20.6% of this theme group

Researchers caution about performance degradation and damage mechanisms in emerging semiconductor and power devices.

Semiconductor (102) · Transistor (79) · Semiconductor device (36) · Power semiconductor device (32)

Fine-Tuning the\nPerformance of Ultraflexible Organic\nComplementary Circuits on a Single Substrate via a Nanoscale Interfacial\nPhotochemic

MECHANISM OF BIJUNCTION SEMICONDUCTOR DEVICE DAMAGE INDUCED BY HEAVY PARTICLES

Reliability of Large‑Scale Integration

19.1% of this theme group

Works warn of reliability pitfalls in very‑large‑scale integration, including electromigration and shared dependency failures.

Electronic circuit (93) · Integrated circuit (84) · Very-large-scale integration (19) · Reliability engineering (17)

Securing Analog Mixed-Signal Integrated Circuits Through Shared Dependencies

Electromigration Failures in Integrated Circuits: A Review of Physics-Based Models and Analytical Methods

Scaling Limits for CMOS Memory

17.1% of this theme group

Studies highlight reliability and aging concerns as CMOS transistors and SRAM cells shrink below 32 nm.

CMOS (113) · Transistor (63) · Static random-access memory (24) · Scaling (25)

Analog circuit reliability in sub-32 nanometer CMOS: Analysis and mitigation

Stralingstolerante en Verouderingsresistente Digitale Geïntegreerde Schakelingen in Nanoscale CMOS Technologie.

Package‑Level Thermal and Mechanical Risks

14.5% of this theme group

Papers discuss thermal cycling and structural optimization needed to maintain reliability in advanced package formats.

Ball grid array (43) · Integrated circuit packaging (51) · Soldering (52) · Lead frame (27)

Chip–Package Interaction and Reliability Improvement by Structure Optimization for Ultralow-$k$ Interconnects in Flip-Chip Packages

Studies on the Thermal Cycling Reliability of BGA System-in-Package (SiP) With an Embedded Die

Photonic Device Integration Risks

13.8% of this theme group

Research points to material and fabrication uncertainties that impede robust photonic integrated circuit deployment.

Photonics (31) · Photonic integrated circuit (17) · Silicon photonics (13) · Wafer (25)

A Review of Integrated Photonic Devices Using Sb₂Se₃

Experimental evaluation of photonic integrated circuits for multilayer photonic neural networks

Interconnect Coupling and Thermal Effects

10.1% of this theme group

Works caution about coupling capacitance and heat management challenges in TSV‑based three‑dimensional ICs.

Through-silicon via (59) · Three-dimensional integrated circuit (58) · Stacking (21) · Interconnection (40)

Analysis of coupling capacitance between TSVs and metal interconnects in 3D-ICs

Thermal analysis of three-dimensional ICs, investigating the effect of through-silicon vias and fabrication parameters

Schottky Diode and Optoelectronic Limits

4.9% of this theme group

Studies raise concerns over defect control and modeling accuracy for high‑voltage Schottky and optoelectronic devices.

Schottky diode (31) · Diode (37) · Schottky barrier (18) · Optoelectronics (33)

Defect engineering in SiC technology for high-voltage power devices

The behavioral approach to silicon carbide power components modeling

Heterojunction Semiconductor Innovations

19.8% of this theme group

Opportunities arise from combining diverse semiconductor materials to enhance device performance while reducing cost.

Semiconductor (493) · Semiconductor device (143) · Transistor (224) · Heterojunction (72)

A Meeting of Materials: Integrating Diverse Semiconductor Technologies for Improved Performance at Lower Cost

Semiconductor transformers

Low‑Power CMOS Amplifier Techniques

19.5% of this theme group

Research explores novel CMOS amplifier designs that enable energy‑efficient mixed‑signal circuits for wireless applications.

CMOS (520) · Amplifier (137) · Electrical engineering (121) · Transistor (174)

Integration of Complementary Metal–Oxide–Semiconductor 1-Bit Analog Selectors and Single-Electron Transistors Operating at Room Temperature

Design techniques for low power mixed analog-digital circuits with application to smart wireless systems.

Secure and Trustworthy IC Architectures

17.2% of this theme group

Papers propose methods to improve timing verification, security, and reliability of integrated circuits.

Electronic circuit (463) · Integrated circuit (360) · Electronic engineering (164) · Mixed-signal integrated circuit (77)

Timing Verification for Adaptive Integrated Circuits

On-chip Structures and Techniques to Improve the Security, Trustworthiness and Reliability of Integrated Circuits

Advanced Design Automation for FPGAs

15.9% of this theme group

Works present new tools for standard‑cell layout, test pattern generation, and FPGA simulation in deep sub‑micron processes.

Scan chain (94) · Standard cell (104) · Field-programmable gate array (76) · Automatic test pattern generation (47)

Standard Cell Layout Generator Amenable to Design Technology Co-Optimization in Advanced Process Nodes

FPGA Simulations of Charge Sharing Effect Compensation Algorithms for Implementation in Deep Sub-Micron Technologies

Next‑Generation Packaging and Bonding

12.3% of this theme group

Research highlights high‑throughput thermal compression bonding and multifunctional temporary materials for advanced interconnects.

Wafer (151) · Integrated circuit packaging (79) · Interconnection (110) · Soldering (62)

A high throughput and reliable thermal compression bonding process for advanced interconnections

Advanced Multifunctional Temporary Bonding Materials with Heterogeneous Integrated Properties for Various Advanced Packaging Applications

Hybrid Silicon Photonics Platforms

8.4% of this theme group

Studies focus on integrating silicon photonic components with electronic circuits to expand optoelectronic functionality.

Photonics (282) · Photonic integrated circuit (202) · Silicon photonics (63) · Optoelectronics (110)

Hybrid Silicon Photonic Integrated Circuit Technology

Silicon photonic devices and integrated circuits

Cost‑Effective 3‑D IC Integration

6.9% of this theme group

Papers describe thermal‑optimized TSV interposers and manufacturing strategies for high‑performance three‑dimensional ICs.

Three-dimensional integrated circuit (166) · Through-silicon via (104) · Stacking (51) · Integrated circuit (111)

Thermal-Enhanced and Cost-Effective 3D IC Integration With TSV (Through-Silicon Via) Interposers for High-Performance Applications

Design and manufacturing enablement for three-dimensional (3D) integrated circuits (ICs)

Shenzhen

48.2% across the displayed hubs

3 companies hiring · $1.7B disclosed funding

Shanghai

15.1% across the displayed hubs

2 companies hiring · $5.8B disclosed funding

Suzhou

7.9% across the displayed hubs

0 companies hiring · $511.9M disclosed funding

Beijing

7.7% across the displayed hubs

0 companies hiring · $8.8B disclosed funding

Hong Kong

7.2% across the displayed hubs

4 companies hiring · $171.0M disclosed funding

Hangzhou

5.5% across the displayed hubs

0 companies hiring · $715.2M disclosed funding

Nanjing

4.4% across the displayed hubs

0 companies hiring · $1.0B disclosed funding

Dongguan

3.9% across the displayed hubs

0 companies hiring · $15.4M disclosed funding